Mentor Forum PCB

Overview

Mentor Forum for PCB is designed to bring you up to speed on all of the latest capabilities within the DxDesigner, Expedition Enterprise and HyperLynx releases. But it also provides a great opportunity to:

  • Understand how the technologies were designed for seamless integrated process flows
  • Get practical advice from Mentor experts who understand how tools operate most efficiently
  • Participate in discussions on how on how to perfect the use of tools for your environment
  • Gain inspiration and knowledge by connecting with peers

 

The seminar will present the latest releases of the PCB design solutions your company has invested in. Immediately before lunch, the 2013 Technology Leadership Awards* (TLA) will be launched. Indeed, there will be guest speakers representing winning teams from the 2012 TLA competition at some of the Forum locations. The seminar concludes with a "sneak preview" to showcase future technology and developments.

 

What You Will Learn

The seminar will present the latest releases of the PCB design solutions and provide insights on how to be more productive and innovative in your PCB design flow. The following releases will be discussed in detail:

 

DxDesigner (v7.9.4)

  • Ease-of-use enhancements: Tips and tricks for beginners to expert
  • Introduction of 'iCES' ; the next step in constraint management

 

Expedition Enterprise (v7.9.4)

PCB designers are under constant time pressure. Using a DDR3 interface as an example, the presentation will demonstrate tips and tricks together with functionality enhancements to make life easier:
  • I/O Designer to quickly assign and optimize FPGA pin assignments
  • HyperLynx SI to obtain a set of realistic DDR3 constraint templates
  • Constraint Editor System (CES) to ensures the consistency of constraint data throughout the design process
  • Expedition PCB capabilities to route and tune the nets according the CES constrain definitions
  • HyperLynx SI DDR wizard to verify the final implementation

 

HyperLynx (v9.0) and HyperLynx DRC

HyperLynx Signal and Power Integrity (v9.0) represents a big step forward with regards to simulation technology and performance, in one easy-to-use solution. Major new capabilities include:
  • Improved trace modeling capability supporting non-ideal planes and references
  • New very accurate simulator providing greater than 5x performance improvements
  • Provision of advanced waveform viewer and processor for displaying and analysing multiple results

 

HyperLynx DRC is a valuable tool for resign reviews, efficiently performing electrical design rule checks on PCB layouts:

  • Saves man days of time by highlighting potential issues relating to SI, PI, and EMI, without running detailed time consuming analysis
  • Ability to customise supplied rules and develop own rules
 

Register Now

NH Hotel Koningshof

Veldhoven

Netherlands

9:15 AM - 4:00 PM

 

 

 

Who Should Attend

  • Team / project leaders

  • Design engineers

  • PCB designers
  • CAD managers

 

Agenda

08h45 – 09h15 Registration

09h15 – 09h30 Welcome

09h30 – 10h45 DxDesigner

10h45 – 11h00 Coffee break

11h00 – 12h15 Expedition Enterprise 

12h15 – 12h30 Technology Leadership

                         Awards

12h30 – 13h30 Lunch

13h30 – 14h30 HyperLynx (v9.0) and

                         HyperLynx DRC

14h30 – 14h45 Coffee Break

14h45 – 15h45 Preview of future

                         developments in core

                         tools

15h45 – 16h00 Conclusion

 

About the presenters

Ruud Wijtvliet

Ruud Wijtvliet is an European Application Engineer specialized in the Board Design Process. Within the Board Design Process Ruud specializes in Library and Design Data Management. Ruud has been working at Mentor Graphics for more than 25 years.

 

Amir Barenholtz

Amir Barenholtz is currently working as a European Application Engineer and joined Mentor Graphics technical PCB Solutions team in 2000. Amir has 22 years of experience covering all aspects in the PCB area such as PCB design and PCB Applications and Analysis.

 

Ad Van Klink

Ad van Klink is the European AE Team Leader for PCB solutions, based in the Netherlands. Ad has been working for 25 years in EDA industry in various sales and technical roles and responsibilities at Daisy Systems, Dazix, Intergraph, Veribest and Mentor Graphics.

 

Sami Aarras

Sami has been working for Mentor Graphics first in customer support and then in application engineer positions since 1999. His expertise covers broadly the hardware engineering flow - from schematic capture to layout design and various board level verification tools. Before joining Mentor Sami worked for Nokia Consumer Electronics and Semi-Tech in electronics HW R&D positions.