Questa ADMS

Questa ADMS

Analog-Digital Mixed-Signal Simulator

Questa ADMS™ gives designers a comprehensive environment for verifying complex analog/mixed-signal (AMS) System-on-Chip (SoC) designs.


Analog and mixed-signal SoC designs combine analog and digital content more tightly than ever before. They increasingly depend on integrated analog blocks such as A to D and D to A converters, phase-locked loops, and adaptive filters. This increased level of integration puts tremendous pressure on designers. Traditional design tool flows force designers to develop analog and digital subsystems in isolation, delaying the integration of these components until IC layout and the testing until after fabrication. Before Questa ADMS, AMS SoC design was a slow, expensive and error-prone process.




  • Enables top-down design and bottom-up verification of multi-million gate AMS SoC designs
  • Lets designers combine language and simulation algorithms to fit the task
  • Universally accepts IP written in any of the standard design languages for easy migration
  • Builds on previous design investments through its design flow integration with Mentor Graphics Custom IC Flow and Cadence Analog Design Environment
  • Empowers high-level, system-level design, architectural exploration, and rapid learning of behavioral modeling techniques


High Performance and Capacity Analog and Mixed-Signal Simulation

Questa ADMS extends the familiar Questa verification platform with analog and mixed-signal standard languages while maintaining a unified simulation environment. ADMS is language neutral; you can combine VHDL-AMS, Verilog-AMS, VHDL, Verilog, SystemVerilog, SPICE and SystemC anywhere and at any level in the design.


Questa ADMS includes the versatile EZwave mixed-signal waveform viewer and waveform calculation tool for display and analysis of mixed-signal results.



ADMS integrates into the Cadence Virtuoso Analog Design Environment with the same look and feel as any simulator inside the environment, but gives designers the advantage of ADMS analysis, commands and options. An enhanced symbol library providing specific Eldo devices is compatible with the Cadence library.


RF Applications

Complete simulation of RF system-on-chip (SoC) designs becomes a reality when you combination the RF capabilities of Eldo RF with the mixed signal capabilities of Questa ADMS. Built upon these solid foundations, the Questa ADMS RF solution allows effective simulation of communication systems containing tightly linked RF and baseband functions—analog and digital.


Questa ADMS Datasheet ►