Calibre Fundamentals: Performing DRC/LVS


This course is not yet planned.

Calibre nmDRC/LVS


Duration: 3 days

Course Part Number: 063568

Course Overview
Learn how to leverage the full power of Calibre nmDRC and Calibre nmLVS by attending the ‘Calibre Fundamentals: Performing DRC/LVS’ course. This course will teach you to effectively use Mentor Graphics Calibre nmDRDC and Calibre LVS software in your layout verification flow and will empower you to analyze DRC and LVS results successfully in coordination with a layout editor. The lecture modules will guide you through the various concepts underlying state-of-the-art layout verification techniques and specific aspects of the Calibre nmDRC and Calibre nmLVS toolset

Hands-on lab exercises will reinforce lecture topics and provide you with extensive tool usage experience under the guidance of our industry expert instructors.

You will learn how to

  • Use Calibre nmDRC and Calibre nmLVS proficiently in the flat and hierarchical modes
  • Debug the flat and hierarchical DRC and LVS results using Calibre RVE™ (Results Viewing Environment) and a layout editor
  • Interpret the various specification statements in your rule file dealing with input files, results database and reports, along with other useful rule file statements
  • Interpret simple and complex DRC checks such as measurement and ERC checks
  • Identify and locate many LVS-related problems such as shorts and opens, floating or isolated nets, pin swapping, devise problems, soft connections, and texting (naming) problems
  • Use the powerful Calibre Interactive Graphical User Interface

Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical experience using Calibre software. Hands-on lab topics include:

  • Job setup and execution
  • Results debugging in a layout editor using Calibre RVE
  • Job customization
  • Applying advanced DRC techniques such as incremental DRC
  • Solving typical LVS problems using such Calibre nmLVS features as short isolation and detection of soft connections
  • Working with layer properties
  • Advanced layout-vs-layout comparison


  • IC Layout Engineers and Layout Verification specialists who will use Calibre nmDRC and Calibre nmLVS tools for layout verification.
  • Front-end Design engineers who would like to have a better understanding of the back-end verification flow.


  • Knowledge of IC Layout techniques and procedures
  • Experience with an IC layout editing tool
  • Understanding of SPICE netlists
  • Familiarity with UNIX/Linux
  • Knowledge of layout verification concepts and tools (helpful but not required)



Student workbook table of contents

For more information:

InnoFour BV
Twentepoort Oost 61-02
The Netherlands
tel +31 546 454 530
fax +31 546 453 006