VSure DFM : A series of articles on best practice - part 5

This article is part 5 of a series that is intended as an introduction to the process flow of performing DFM Analysis using the Mentor vSure product.

This article will focus on the actual DFM Analysis, a method to check a design against the manufacturing guidelines and/or limitations to minimize the number of revision spins and improve the overall quality. The vSure DFM Analysis can be divided into three main parts: the Bareboard Fabrication Analysis using over 275 different rules, the Netlist Analysis and the Assembly Analysis using over 250 different rules. All these different rules are managed on a per model basis in the ERF Manager. In general most users will start with a model based upon the IPC standards and evolve into board technology specific rules and/or assembly process related rules.

In essence a rule is the definition of a specific check category with a production limit value, a yield improvement value and a reporting value. The production limit value sets the threshold between good and bad and the yield improvement value will set the recommended values for better quality. As this definition is valid for all rules we will use a known category to explain this a bit more.

Example 1) For the category Copper to Board Outline the IPC tells us that we should have at least a spacing of 0.5 mm which will result in a vSure rule: f2outer = 0.5 1.0 5.0 

When the measurement is less than 0.5 mm the analysis will report an issue that needs to be reviewed.

Example 2) For the category Solder Mask Coverage a BareBoard Manufacturer informed us that they need at least 75 microns of soldermask width to make sure that it sticks to the FR4 basematerial. So this information will result in a vSure rule: Coverage = 75 100 150 

When the measurement between the edge of the copper track and the edge of the soldermask opening is less than 75 micron the analysis will report an issue that needs to be reviewed.

Performing the actual DFM Analysis using the vSure application is either selecting a single DFM action that needs to be processed or selecting a predefined DFM checklist and run a group of DFM actions in one go. For each DFM action a specific model can be selected containing all the rules and all the values that are applied. In both cases the result is a text or graphical report with all issues that need a review. 

	This default Fabrication checklist shows a Drill check, the Etching Analysis, the Signal Layer check, the Power/Ground Layer check and the Solder Mask check. It also shows that each DFM Actions has some issues that need a review indicated by the RED status marker
		For each DFM Action you can select the ERF button to see a list of possible ERF models. In this example the model for a 100-micron design is selected.

The same default checklist can be predefined for the Assembly Analysis, stored in the library and re-used for each new design that needs to be checked.

This default Assembly checklist shows a check for Fiducials, Components, Padstacks, Testpoints, Solderpaste and Pin-to-Pad ( solder quality). It also shows that each DFM Actions has some issues that need a review indicated by the RED status marker.                     Selecting the “Green” Results Viewer button will open a window that lists all the Check Categories that has measurements lower than the production limit value.

Without going into great detail the selected category “Fiducial to conveyed edge” has a production limit of 3000 micron. The selected first issue is a fiducial that is only 1871 microns away from the board edge. Thus too close. We might need to advise the layout engineer to move the fiducial .

And finally we show a few DFM issues that were found during demo’s and benchmarks to indicate the broad range of production issues that the vSure application can detect.

Slivers can cause repeat defects at fab due to resist flaking	Acute angles create acid traps		Stubbed vias can effect signal
Duplicate via drills will cause drill bits to break and cause scrap	Close pads/traces may bridge during imaging, plating or soldering, and result in a direct short	Starved thermal vias prevent proper heat containment and may effect quality of hole plating	Non-plated thru holes too close to copper run a risk of a stress fracture in the copper or a “bite” from the drill
Missing solderpaste may result in broken net connectivity	Traces under low-lying components can cause components to rock, causing poor solder joint	Component to Component spacing varies by component types and orientation	Tall components too close to rout can be damaged by rout bit head