Overview
FPGA I/O Optimizer (IOPT) controls, coordinate and optimizes FPGA signal/pin assignments resulting in a significant reduction in design cycle time for PCB designs that include FPGAs. Control is achieved through use of vendor approved parts that thoroughly capture pin functions and bank definitions. Coordination is achieved through import and export of schematic connections, PCB part placement, FPGA vendor pin reports and constraint files, as well as HDL and signal lists. Optimization is achieved through function-aware swapping of pin assignments to potential reduce routing requirements in the PCB. Finally, IOPT provides fast and easy creation of FPGA symbols and their Part definitions.
What You Will Learn
Who Should Attend
What
Customer Technical Webcast: Using FPGA I/O Optimizer to Enhance Routability of PCBs that Include FPGAs
When
Tuesday the 28th of July 2020
Where
Online
Time
6:00 PM - 7:00 PM CEST
EDA
Electrical & Wire Harness Design
Electronic System level Design
Support
ALM
PLM
Education & Consulting
Vendors
InnoFour
Twentepoort Oost 61-02
7609 RG Almelo
The Netherlands
tel +31 546 454 530
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