PCB Design Perfection Starts in the CAD Library - Part 2

Part 2 – The 1608 (EIA 0603) Chip Component

Guidelines and Recommendations - Tom Hausherr Mentor Graphics Corp.


Chip components are the majority of the parts on a normal PCB layout. Chip components have a “Wraparound” lead form. The last PCB layout I did had 698 capacitors, 386 chip resistors and 81 chip inductors. The entire design had 1,250 parts and 1,165 or 93% were chip components. So it is very important that we address chip components first. The majority of chip components are metric by design. i.e.: 90% of all chip component dimensions are whole metric values. See Figure 1 for the dimensions of a standard 1608 (EIA 0603) component superimposed with its related land pattern and placement courtyard excess of 0.25 mm. Notice that the placement courtyard is 3.0 mm X 1.5 mm. This is perfect for placing this land pattern using a 0.5 mm grid system. They all line up perfectly.


The land size and centric placement are rounded in 0.05 mm increments to enhance trace routing using a 0.05 mm routing snap grid and trace widths in 0.25 mm increments.




Figure 1


Figure 2 illustrates four of the most popular trace/space routing technologies that use a 0.05 mm routing grid. The 6 most popular metric trace widths rounded in 0.25 mm increments –

  • 1. 0.075 mm (3 mils)
  • 2. 0.1 mm (4 mils)
  • 3. 0.125 mm (5 mils)
  • 4. 0.15 mm (6 mils)
  • 5. 0.2 mm (8 mils)
  • 6. 0.25 mm (10 mils)


The main point that I am trying to make here is that using a PCB design grid system is best when using most CAD tools. One of the exceptions to this is the Expedition Enterprise CAD tool that handles gridless solutions effortlessly.

But for everyone else in the industry, building CAD libraries, part placement, via fanout and trace routing using specific snap grids greatly enhances the speed and quality of the PCB layout.


The standard universal grid system today is 0.05 mm but at times 0.025 mm increments need to be used specifically for trace/space rules.


The next generation of grid systems in the near future will be 0.01 mm, which I refer to as “high resolution”. There will never be a need to go more than 2 places to the right of the decimal point for any PCB design feature values.



Figure 2


The same chip component technology can be applied to every chip resistor and capacitor used in the industry today. The most relevant aspect of this technology is that a 0.1 mm placement grid and a 0.05 mm routing grid system produces optimized results regardless of the trace/space technology because the land (pad) center snap grid is 0.05 mm from the origin and the land (pad) size round-off values are in 0.05mm increments.


Let’s talk about via fanout solutions for the same 1608 (EIA 0603) chip capacitor. In Figure 3 you can see 2 different fanout options and one is superior to the other. The fanout coming out the top has all the key features. The vias are 0.4 mm closer to the capacitor component terminals than the typical right/left fanout which decreases impedance and increases capacitance. Also, the top fanout vias snap to a 1 mm grid because the 1608 land pattern was snapped to a 0.5 mm grid system. The 0.5 mm via land (pad) diameter with 0.25 mm hole size and 0.7 mm plane anti-pad is perfect for 0.1mm trace/space technology. See Figure 4 for the routing solutions. The trace width for the power fanout is 0.3 mm.



Figure 3


Figure 3 clearly illustrates the superior routing channels between two vias placed on a 1 mm snap grid. This same example can be used for all Chip and Molded Body Resistors and Capacitors. It is important to note that the plane anti-pad clearance does not infringe on the trace. The trace requires a clean uninterrupted return path on the adjacent reference plane. This via land, hole size and trace/space technology is very easy to manufacturer and does not require additional fabrication cost.



Figure 4


The part placement of the 1608 (EIA 0603) can use a 0.5 mm snap grid and the placement courtyards can be placed side by side. The via fanout can be a 1 mm snap grid when exiting the side of the land pattern, otherwise when exiting the top and bottom, a 0.1 mm snap grid can be used. See Figure 5 for the placement and fanout example for the 1608 (EIA 0603) chip components. Side via fanout is superior for bypass capacitors connecting to the planes and best for 1 mm via snap grid. The top and bottom fanout is OK for signal resistors.



  Figure 5


Coming Up

Additional brief topical articles will appear in future newsletters. You can also read more detail in my blog, which can be found at: http://blogs.mentor.com/tom-hausherr/


Written by Tom Hausherr CID+

EDA Library Product Manager

Mentor Graphics Corporation