PCB Design Perfection starts in the CAD Library - Part 12

PCB Design starts in the CADS library - Part 12

Land Calculation


IPC-7351B for SMT technology defines the rules for creating optimized land pattern CAD library parts using a 3-Tier system – Least (high density), Nominal (controlled environment) and Most (ruggedized & shock resistant). Many PCB designers and CAD Librarians have heard about the IPC-7351B standard, but few people know how they work. The IPC LP Calculator has made life easy for the PCB design industry by automatically generating accurate land pattern data derived from component dimensions.


Land (Pad) Size and Location:


These 7 factors are used to calculate the optimum Land Size –

  1. Component Body Tolerance
  2. Component Terminal Tolerance
  3. Fabrication Tolerance
  4. Placement Tolerance
  5. Land Size Round-off
  6. Land Spacing Round-off
  7. Solder Joint Goals for Toe, Heel and Side


IPC-7351 identifies two component body dimensions “A” (body width) & “B” (body length).  The one SMT Component Body Tolerance that affects the land pattern is the minimum and maximum sizes of the component “Lead Span” (the dimension from lead tip to lead tip) dimension "L". This varies for different component packages. For Gull Wing or J-Lead it’s the distance from outside lead tip to tip. For chip resistors or capacitors it’s the full tolerance of the overall body. The picture below represents the "L" dimension of a gull wing lead component. See Figure 1.


Figure 1: Lead Span


The Component Terminal Tolerance is the size of the metalized area that actually touches the land area. IPC refers to this as the component footprint. The footprint must compensate for the minimum and maximum lead tolerance for the calculation of an optimized land size. The component lead footprint is then synchronized with the appropriate land pattern. See Figure 2.


Figure 2: Terminal Tolerance


The Fabrication (Manufacturing) Tolerance compensates for the fabrication allowance for etch back. By adding a fabrication tolerance, we calculate the land area that we need after the fabrication etching process. The IPC-7351 fabrication tolerance is 0.05mm. See Figure 3.


Figure 3: Fabrication Tolerance


The Placement (Assembly) Tolerance compensates for the pick and place machine accuracy. When parts are manually placed or machine placed, there is a small margin of placement accuracy that must be accounted for. The IPC-7351 assembly tolerance is 0.05mm.


Land Place (Spacing) Round-off relates to the land center to land center spacing. The goal in the IPC-7351 is to place all lands on a 0.05mm grid, so the space between the land span is rounded to 0.1mm increments so that the distance from the center of the land pattern to the center of the land is in 0.05mm increments. This plays a critical role in trace routing to achieve the highest packing density and cleanest routing results. In this picture example of a common chip component in Figure 4, the land snap grid is 0.05 mm from the center of the part to the center of the lands. The C1 and C2 dimensions.


Land Size Round-off is the value that the land size rounds up or down to. The IPC-7x51 standards round land sizes to 0.05mm increments with the exception of micro-miniature component packages that are typically less than 1.6mm in size. The micro-miniature part land size round-off is set to 0.01mm increments. In Figure 4, the "X" & "Y" dimensions are rounded off in 0.05 mm increments. Even the land corner radius is rounded in 0.05 mm increments. When you export your PCB design layout database, all numbers for every design element should be in 0.05 mm increments. This greatly optimizes your PCB layout but also organizes all the graphics for best in class aesthetics for your PCB design layout.


Figure 4 - Land Place and Size Round-off


Solder Joint Goals for Toe are usually the outside the component lead with two exceptions, the J-Lead and the Molded Body components the Toe is under the component body. The Heel goals are normally on the inside of the component lead and the side goals are for both sides of the component lead.  In Part 5 of this series I listed the component Lead Forms. Every lead form has its unique solder joint goal table. Here is a sample table for the Least, Nominal and Most "Toe, Heel and Side" goals and the placement courtyard excess for the gull wing component family. Notice the Round-off factor is in 0.05 mm increments.

See Table 1.


Table 1 - Gull Wing Solder Joint Goal Table


When all of the tolerances, round-offs and solder Joint goals are applied the end result is a perfect land pattern. See Figure 5.


Figure 5 - Land Pattern & Component with Tolerances


If all the tolerances and solder joint goals were removed from the mathematical model, the component lead would be equal to the land size. this is the starting point for all land size calculations. Figure 6 illustrates a chip component (black outline) without tolerances, round-offs, or solder joint goals and the land size (cyan) without a toe, heel or side goal.


Figure 6 - Land Pattern & Component


The resulting solder joint for a chip component should look similar to this picture. Note that the component terminal never touches the land. There must be solder paste between the component lead and the land to form the best solder joint. See Figure 7. Here's a note from the IPC J-STD-001D "Requirements for Soldered Electrical and Electronic Assemblies". Section 4.14 Solder Connection : All solder connections shall indicate evidence of wetting and adherence where the solder blends to the solder surface. 


Figure 7 - Chip Solder Joint


Coming Up

Additional brief topical articles will appear in future newsletters. You can also read more detail in my blog, which can be found at: http://blogs.mentor.com/tom-hausherr/


Written by Tom Hausherr CID+

EDA Library Product Manager

Mentor Graphics Corporation

Reprinted by permission from iConnect007