Given a description of power intent expressed in the industry-standard Unified Power Format (UPF), the Questa Power Aware Simulator
- partitions the HDL design into power domains,
- adds isolation, level-shifting, and retention cells, and
- integrates the power supply network into the design to power each domain
The augmented HDL design can then be simulated with full control over the power state of each domain, for accurate modeling of the effects of active power management on the design’s functionality.