Power Integrity Analysis

HyperLynx Power Integrity

Accurately model power distribution networks and noise propagation mechanisms throughout the PCB design process.

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  • Identify potential power integrity distribution issues
  • Investigate and validate solutions in an easy-to-use, “what-if” environment
  • Reduce prototype spins, shorten time to market, and allow engineers to develop more reliable products

On Demand Web Seminar

Optimizing Power Delivery with Effective Decoupling. Learn how decoupling issues can affect your PCB design, and how HyperLynx PI can pinpoint and resolve power-delivery issues.

Analyze voltage drop

Model multiple DC supplies to identify areas where voltage drop and current densities exceed safe limits.

PDN impedance validation

Quickly model your distributed PDN to assess the impedance seen by critical components, validating your design against manufacturer specifications.

Optimize PDN behavior

The PDN Decoupling Optimizer automatically determines the best locations and values for decoupling capacitors. Reduce your design’s manufacturing cost while ensuring PDN impedance requirements are met.

Technical Specifications

  • Industry-renowned ease of use: automated workflows guide users through setup and analysis step by step

  • High-performance, high-capacity simulation engines

  • Automated post-route verification integrates with all major PCB layout systems

  • Pre-route graphical editor allows import of layout data and interactive modification to provide “what-if” analysis of potential design changes

  • Analyze DC voltage drop and current density
    • Identify potential DC power delivery issues such as excessive voltage drop, high current densities, excessive via currents and associated temperature rise
    • View simulation results in graphical and report format, making problems in DC power delivery quick and easy to identify
    • Predict temperature rise with PI/thermal co-simulation

  • Analyze AC power distribution network (PDN) behavior
    • Analyze power distribution impedance at multiple locations on PCB
    • Verify PDN impedance against component manufacturer specifications
    • Optimize capacitors use, placement, and mounting in your PDN through analysis
    • Quickly investigate different design strategies for your PDN and their effect on impedance
    • Explore different stack-ups, capacitor selections, placements and mounting schemes
    • Extract models of the system PDN
    • Extract PDN models as S-parameters, Z-parameters, or Y-parameters

  • Automated PDN Decoupling Optimizer
    • Synthesizer pass uses 6 different algorithms to create base populations of decoupling capacitors
    • Optimizer pass uses accelerated genetic optimization techniques to find solutions that meet impedance requirements and reduce total design costs

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