Assert Like a Pro: Discover Visualizer's Assertion Debugging Capabilities
Overview
Join us to explore how Visualizer’s Assertion Capabilities simplify assertion debugging without compromising productivity or observability.
Assertion-Based Verification is a powerful technique that can greatly enhance the efficiency and effectiveness of the design verification process. However, debugging failed assertion can be time consuming without the right tools.
In this webinar, you will see all the powerful assertion related features that Visualizer provides with the Assertion Window and the Assertion Thread Viewer which will enable you to quickly locate and determine the cause of any simulation-based failures caused by complex assertions, thus improving observability, and greatly reducing debug time.
What You Will Learn:
- A brief overview of SystemVerilog Assertions
- The advantages of a testbench with assertions – improved productivity and observability
- How to view assertions in Visualizer using the Assertion Window in post-simulation mode
- How to use the Assertion Thread Viewer in live-simulation mode for effectively debugging a failed assertion
- CLI options for assertions in Visualizer
- Assertion coverage and cover directives
Who Should Attend?
- Verification and design engineers who are looking for easier ways to detect and debug assertion failure using Questasim and Visualizer.
Products Covered
- Questasim
- Visualizer
Details
What
Customer Technical Webcast: Assert Like a Pro: Discover Visualilzer's Assertion Debugging Capabilities
When
Tuesday, March 19, 2024
Where
Online
Time
18:00 hr CET
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