A comprehensive solution for power intent verification and early power estimation. The Questa One low power solution, with UPF 4.0 support, spans the entire design flow, from architectural choices and high-level verification to RTL development, emulation and implementation of ASIC and FPGA designs.
Questa One low power signoff verification
Questa One Power Aware offers a comprehensive verification platform with advanced power analysis features for complex system on chip designs and supports unified power format (UPF) 4.0. It integrates dynamic Power Aware simulation, clock domain crossing (CDC), dynamic voltage and frequency scaling checks, test plan authoring, advanced coverage analysis and a unified debug environment with coverage metrics.
read more