Live Webcast: Accelerating Coverage Closure with Intelligent Testbench Automation
Achieving functional coverage closure in today’s complex designs is challenging and time consuming. It is common for a verification team to spend a disproportionate amount of time attempting to achieve the last 20% of functional coverage, by identifying corner cases manually, struggling to create overly complex constraints, and often times resorting to writing lengthy directed tests to target these cases.
Mentor Graphics has a proven methodology to accelerate functional coverage closure, freeing up resources to achieve more verification. Questa Ultra’s Intelligent Testbench Automation solution generates stimulus according to the user’s functional coverage goals, eliminating redundant stimulus and efficiently targeting corner cases. The result is 10x to 100x faster functional coverage closure.
What You Will Learn
- How to achieve your targeted functional coverage 10x to 100x times faster
- How to ensure that each and every test sequence generated has a purpose
- How to achieve the most verification per cycle of simulation
- How to extend this capability across an entire simulation server farm
- How to do this while reusing 95% or more of your existing verification IP
Who Should Attend
- Design and Verification Engineers and Managers
- What: Accelerating Coverage Closure with Intelligent Testbench Automation
- When: Thursday 3rd of November 2011
- Where: Online
- Time: 16:00 PM CET
- Duration: 1 hour
- Registration: Web
More than 90% of today’s designs contain multiple clocks, and all such designs can potentially fail if communication between clock domains is not correctly synchronized. This webinar presents Questa CDC Verification and describes how it is used in world-class production verification flows to detect and eliminate potential problems in multi-clock designs.Live Webcast: Verification Management and Planning
When verification is not under control, project schedules slip, quality is jeopardized and the risk of re-spins soars. What’s required is a common platform and environment that provides all parties – system architects, software engineers, designers and verification specialists – with real-time visibility into the project. And it’s not just to the verification plan, but also to the specifications and the design, both of which change over time.