Mastering Worst-Case Corner Verification with Solido Design Environment
Overview
PVT and Monte Carlo verification with traditional methods are often slow and/or inaccurate. Traditional methods can also lead to over- or, even worse, under-design.
However, in Solido PVTMC Verifier - included in Solido Design Environment - all your PVT corners are simulated with full Monte Carlo accuracy out to your target sigma, so you get the statistical data necessary for important design choices. It also provides clear sensitivity analysis with no extra simulations to help identify critical devices in your design.
Combined with Solido DesignSense, another part of the Solido Design Environment, you can optimize your design to better meet specifications.
What You Will Learn:
- Corner and Monte Carlo Simulation in PVTMC Verifier
- Extracting and fixing your worst corner using DesignSense
Who Should Attend?
- Analog and Mixed-Signal designers
Products Featured:
- Solido Design Environment
- PVTMC Verifier
- DesignSense
Details
What
Customer Technical Webcast: Mastering Worst-Case Corner Verification with Solido Design Environment
When
Thursday, November 16, 2023
Where
Online
Time
18:00 hr CET
Join us at this Expert Series webinar and join members of the HyperLynx customer support team for a round table discussion and audience member.
Auto Routing Methodologies and Best Practices Expert SeriesIn this portion of the Routing Methodologies and Best Practices Expert Series webinar, basic methods and approaches will be demonstrated, proven, and captured for reuse.