PADS Professional

DDR Design

Efficient DDR design can help you meet the demand for swift product development and reduced operating costs as DDR memory is quickly becoming the standard for SoC applications.


The DDRx Memory interface is the most complicated modern bus. Here's what you can do to make things easier...


  • The HyperLynx DDR wizard interactively walks engineers through a series of questions to set up parameters for use in SI and timing simulations.
  • Users are guided step by step through the process of selecting IBIS models for controller and memory devices, specifying drive-strength and On-Die-Termination (ODT) settings for read/write cycles, and defining byte-lane/strobe/mask assignments.
  • Wizard configurations can be saved as templates and recalled for future use, saving ramp-up time in future projects.
  • YOU DON'T HAVE TO BE AN EXPERT to analyse DDRx interfaces LIKE A PRO!

From wearable devices to automobiles, DDR memory is quickly becoming the standard for SoC applications. Efficient DDR design in PADS Professional will help you accelerate product development. PADS Professional is compatible with a range of powerful tools to meet the growing demand for DDR-centric designs.

  • Pre-layout analysis explores design tradeoffs and determines initial constraints
  • Automated sketch routing and tuning ensures that you are meeting your layout constraint requirements
  • Post-layout simulation confirms proper functionality

download whitepaper

Fields with * are required

PADS Pro DDR Design

Powerful features available in HyperLynx DDR allow you to visualize real-world performance.

Want to learn more let us know.

Fields with * are required