Distribution of Currents in Via Arrays

Overview

It is very common for intuition about the balancing of currents in via arrays to be incorrect.  For whatever reason, it is thought that if a large number of vias are placed in an array to stitch a couple of power planes together, the currents will always divide up equally amongst those vias.  However, this is rarely the case.  The resistances of the vias are the main determinant of how current will divide amongst the vias, as the current always seeks the path of least resistance.  A DC Drop simulation will reveal how those currents truly divide.
 

What You Will Learn:

• How to better anticipate how current will divide amongst vias in an array
• How to simulate and understand DC Drop issues in HyperLynx
• How to use HyperLynx LineSim to solve via array current distribution issues
• How to better lay out stitching vias to balance currents

Who Should Attend:

• Power Integrity specialists
• HyperLynx SI/PI users
• High-power board designers
• Layout personnel
• Anyone who has ever stitched two power planes together with vias

Products Covered:

• HyperLynx SI/PI
• Flotherm/FLOEFD

Details

What

Customer Technical Webcast: Distribution of Currents in Via Arrays

When

Thursday the 22nd of September 2022

Where
Online

Time
18:00 CEST