06 July 2015

Electrostatic Discharge: A Potentially Dominant Failure Mechanism

Electrostatic Discharge, or ESD, is a single-event, rapid transfer of electrostatic charge between two objects, usually resulting when two objects at different potentials come into direct contact with each other. ESD can also occur when a high electrostatic field develops between two objects in close proximity. ESD is one of the major causes of device failures in the semiconductor industry. Voltage suppression devices are needed in electronic systems to prevent damage to electrical components from electrical overstress (EOS) and electrostatic discharge (ESD) events. In this webinar DfR Solutions will present the issues and a methodology for defining the requirements for your application to address ESD at the component, circuit board and system levels.

Electronic Polymers Inc. will then present how a low capacitance, polymer voltage-suppressor (PVS) device is evaluated using various testing techniques that combine transmission line pulse (TLP) test system, direct discharge HBM, and a system-level ESD gun. Additionally, test methods for integrating PVS devices for system-level ESD protection of cell phone, GaAs switches for radio frequency (RF) and Gigabit Ethernet server semiconductors will be shown. EPI’s work demonstrates the need for integration of device-level and system-level test methodologies for correlation between component ESD survivability and system-level ESD concerns.



Electrostatic Discharge (ESD): A Potentially Dominant Failure Mechanism

Presenters   Greg Caswell of DfR Solutions and Wolfgang Kemper of Electronic Polymers
When Thursday the 16th of July 2015
  5:00 PM - 6:30 PM CEST
  8:00 PM - 9.30 PM CEST