Live Webcast: Concurrent DFM Verification for Assembly

09 November 2010

Live Webcast: Concurrent DFM Verification for Assembly

 

Overview

The assembly of a printed circuit board is typically the most expensive part of the manufacturing process. Not only are the components associated with the PCB expensive, but any errors not found until PCB assembly can mean the scrapping of the PCB itself if layout changes are required.

 

Mentor's vSure DFM verification solution identifies manufacturability issues concurrent with your design process, effectively performing a virtual prototype of your design. This greatly reduces the number of revision spins it takes to reach your volume and quality objectives.

 

This session will include an EMS company's perspective and a product demonstration.

 

What You Will Learn

  • Common assembly issues that result in frequent board re-spins
  • Checks that can be performed to optimize yield and minimize assembly costs
  • How to adopt a repeatable DFM validation process concurrent with your layout design

Who should attend

  • CAD management with time and cost objectives
  • NPI engineers seeking to achieve first pass manufacturability
  • PCB designers trying to efficiently integrate manufacturing constraints into their design process

Details:

  • What: Concurrent DFM Verification for Assembly
  • When: Thursday 16th of December 2010
  • Where: Online
  • Time: 16:00 PM CET
  • Duration: 1 hour
  • Registration: Web