Live Webcast: Reduce Design Time and PCB Manufacturing Costs with FPGA-PCB Optimization

17 March 2011

Live Webcast: Reduce Design Time and PCB Manufacturing Costs with FPGA-PCB Optimization

 

FPGA on PCB implementations are evolving as ever-increasing integrated circuit density and performance are pushing greater system functionality on-chip and moving signaling interfaces to the device pins on 1000+ pin BGA packages. The flexibility of programmable drive standards and pin selection on hundreds of user I/O's with dozens of signaling technologies has increased complexity of the FPGA- PCB integration process. This session discusses customer implementation of advanced optimization technologies for single- and multiple-FPGA boards to accelerate time to market while minimizing PCB manufacturing costs.

 

What you will learn:

  • Challenges faced and savings achieved through concurrent FPGA/PCB optimization
  • Interface to FPGA design and 'what if' device/pin selection to vendor electrical and logical rules
  • Automated pin unraveling to untangle pin assignments to critical PCB interface components/connectors and between multiple FPGAs

Who Should Attend:

  • Engineering Managers
  • FPGA Designers
  • PCB Designers
  • Project Managers

Details:

  • What: Reduce Design Time and PCB Manufacturing Costs with FPGA-PCB Optimization
  • When: Thursday 14th of April 2011
  • Where: Online
  • Time: 16:00 PM CET
  • Duration: 1 hour
  • Registration: Web