18 October 2022

Signal Integrity Analysis Essentials


Did you know: the average cost of a design respin is more than $28K



In this age of modern electronic design, signal integrity has become an essential factor. Increasingly fast edge rates in today’s integrated circuits cause detrimental high-speed effects, even in PCB designs running at low operating frequencies. As these ICs switch faster, we see boards suffer from signal degradation including over/undershoot, ringing, glitching, crosstalk, and timing problems.


Ensure that you are getting designs right the first time, avoiding costly overdesign, and saving recurrent test cycles in the lab with built-in HyperLynx SI in PADS Professional.


What You Will Learn

  • Predict and eliminate signal integrity problems pre-layout
  • Analyze signal integrity and timing following part placement post-layout


Who Should Attend

  • Electrical Engineers
  • PCB Designers
  • Anyone interested in signal integrity


Products Covered




Web Seminar: Signal Integrity Analysis Essentials



Tuesday the 18th of October 2022






10:00 hr CEST