Solving a Failing Signal in your Design - Techniques for Success
Overview
This webcast will cover the analysis of a failing signal line in a DDR3 design and go through debugging features built into Hyperlynx. These techniques will not only help you solve problems with DDR3 signal lines but can be used in general to solve most signal issues. We will start off with a general discussion on what causes a signal to fail and the possible solutions to said issues. This will lead into a demo of the tool applying the learned knowledge to resolve the signal issue.
What You Will Learn
- General issues that cause signals to fail
- Debugging techniques to resolve signal issues
- Features in Hyperlynx designed help fix a failing signal
Details
What
Live customer webinar: Solving a Failing Signal in your Design - Techniques for Success
When
Thursday the 10th of December 2020
Where
Online
Time
6:00 PM - 7:00 PM CEST
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