Respins of PCB designs…everyone hates them. But did you know that one of the chief causes leading to a PCB redesign is stackup problems? As circuits unceasingly continue to get faster, the stackup becomes increasingly a source for issues. Poor choices of laminates, prepreg, and copper weights can lead to signal integrity problems that must be solved before the product can be mass-produced.
Z-planner Enterprise allows you to make direct Dk and Df measurements from laminates from 1-20 GHz, perform stackup DFM and design for signal integrity (DFSI), execute cross-section analysis, account for material choices, and even includes a wizard to make learning and use quick and efficient. The Dielectric Materials Library gives you the power of an onboard storehouse of specifications on more than 150 laminates from industry-leading manufacturers.