
Live Webcast: Integration & Analysis of Electro-Mechanical Systems
Overview
This webinar will present an innovative system-integration methodology, illustrated using sample systems, to help you create a fully functioning, on-time product, rather than one that gets to market late, with intermittent field failures.
Today’s cross-discipline electro-mechanical or “mechatronic” systems (combining mechanical, electrical, control, and software systems) require highly coordinated modeling, simulation, and interaction among members of the extended design team.
What You Will Learn
- Basic analog, digital, mixed-signal and multi-technology modeling, leveraging a large library of built-in SPICE models, easily added vendor models, and using datasheet-driven graphical modeling methods.
- Digital hardware modeling and simulation—running in the context of a complete electro-mechanical/mechatronic system.
- Parametric and statistical analysis methods to improve quality and reduce manufacturing and warranty costs.
- Going beyond analog and digital electronics to include thermal, electro-magnetic and mechanical components, as well as digital logic and other critical aspects of the mechatronic system, using VHDL-AMS.
- Collaboration with colleagues who are using Simulink for control algorithm design, so they can include higher fidelity hardware models “in-the-loop.”
- Execution and verification of C-code from your embedded system control or supervisory software function, also in the context of the mechatronic system.
Who Should Attend
- Engineering managers concerned about improving quality while reducing design-cycle time
- System-design engineers
- Engineers and managers involved in analog, digital, or mixed-signal system design
- Engineers and managers involved in mechatronic system design - particularly in rapid prototyping environments where return on tool investment is critical
Details
- What: Integration & Analysis of Electro-Mechanical Systems
- When: Thursday 8th of April 2010
- Where: Online
- Time: 16:00 PM CET
- Duration: 1 hour
- Registration: Web
This Advanced Verification Jumpstart will be the start for Design and Verification Engineers to learn more about new methods in advanced verification using SystemVerilog Assertions (SVA) and Functional Coverage.